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$6.05 Shipping Condition: New – Open box Location: Greenfield, United States Herley CTI phase locked PDRO precision oscillator 13300 MHz, 13.3 GHz.
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$12.45 Shipping Condition: New – Open box Location: Greenfield, United States Herley CTI phase locked PDRO precision oscillator 14300 MHz, 14.3GHz.
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$12.45 Shipping Condition: New – Open box Location: Greenfield, United States For sale is: Herley CTI Phase Locked DRO. Tested with data. As of 2013/06/22 we had 13 different models(different eBay listings) of the DRO. All tested ... moreto output correct power, frequency and display lock. Link to manufacturer datasheet is here: Phase noise note: Phase noise below 300kHz is limited by the clock reference. Due to ultra-low phase noise nature of the device. In order to achieve specified phase noise, an ultra low noise clock reference is required. For example the Frequency Electronics FE-102, 100MHz reference has-170dBc/Hz phase noise at 10kHz offset. Reference clock note: The RF output frequency is related to the input frequency in an integer fashion. Typical reference clocks need to be in the 20MHz- 100MHz range. For example. A 13300MHz DRO needs a 100MHz clock(we found 50MHz and 25MHz to work as well) Please see pictures and data table. Manufacturer Herley CTI. Manufacturer Part Number PDRO T_13.4, Type PDRO. Phase Locked DRO, RF Output RF Output Port SMA-F. RF Output Power(dBm) +13dBm minimum(datasheet spec) 14.6dBm- 16.8dBm(measured across 13 models that we have in stock) RF Output Frequency(MHz) 13400 +/ N*10kHz(N = multiplier factor) RF Output Frequency stability Reference dependent, Phase Noise Reference dependent, Offset(Hz) SSB Phase Noise(dBc/Hz) 100, reference dependent. See phase noise theoretical plot below table, 1K, reference dependent. See phase noise theoretical plot below table, 10K, reference dependent. See phase noise theoretical plot below table, 100K, reference dependent. See phase noise theoretical plot below table, 1M, 130, REF CLK Input REF CLK Input Port SMA-F. REF CLK Frequency(MHz) 100 MHz. As well as 50MHz, and 25MHz(tested) REF CLK Power(dBm) 3dBm to +3dBm(datasheet spec) We found that the DROs would lock with a-20dBm clock as well, DC Power Supply Voltage, 15VDC +/ 0.5V. Filtered feedthru connector, GND, Solder pin, Phase Lock Alarm Connector. Filtered feedthru TTL High. Locked. TTL Locked. Unlocked, Shipping: We always pack with care to ens
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$12.45 Shipping Condition: New – Open box Location: Greenfield, United States For sale is: Herley CTI Phase Locked DRO. Tested with data. As of 2013/06/22 we had 13 different models(different eBay listings) of the DRO. All tested ... moreto output correct power, frequency and display lock. Link to manufacturer datasheet is here: Phase noise note: Phase noise below 300kHz is limited by the clock reference. Due to ultra-low phase noise nature of the device. In order to achieve specified phase noise, an ultra low noise clock reference is required. For example the Frequency Electronics FE-102, 100MHz reference has-170dBc/Hz phase noise at 10kHz offset. Reference clock note: The RF output frequency is related to the input frequency in an integer fashion. Typical reference clocks need to be in the 20MHz- 100MHz range. For example. A 13300MHz DRO needs a 100MHz clock(we found 50MHz and 25MHz to work as well) Please see pictures and data table. Manufacturer Herley CTI. Manufacturer Part Number PDRO T_12.3, Type PDRO. Phase Locked DRO, RF Output RF Output Port SMA-F. RF Output Power(dBm) +13dBm minimum(datasheet spec) 14.6dBm- 16.8dBm(measured across 13 models that we have in stock) RF Output Frequency(MHz) 12300 MHz +/ N*10kHz(N = multiplier factor) RF Output Frequency stability Reference dependent, Phase Noise Reference dependent, Offset(Hz) SSB Phase Noise(dBc/Hz) 100, reference dependent. See phase noise theoretical plot below table, 1K, reference dependent. See phase noise theoretical plot below table, 10K, reference dependent. See phase noise theoretical plot below table, 100K, reference dependent. See phase noise theoretical plot below table, 1M, 130, REF CLK Input REF CLK Input Port SMA-F. REF CLK Frequency(MHz) 100 MHz. As well as 50MHz, and 25MHz(tested) REF CLK Power(dBm) 3dBm to +3dBm(datasheet spec) We found that the DROs would lock with a-20dBm clock as well, DC Power Supply Voltage, 15VDC +/ 0.5V. Filtered feedthru connector, GND, Solder pin, Phase Lock Alarm Connector. Filtered feedthru TTL High. Locked. TTL Locked. Unlocked, Shipping: We always pack with care to
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$8.85 Shipping Condition: New – Open box Location: Greenfield, United States For sale is: Herley CTI Phase Locked DRO. Tested with data. As of 2013/06/22 we had 13 different models(different eBay listings) of the DRO. All tested ... moreto output correct power, frequency and display lock. Link to manufacturer datasheet is here: Phase noise note: Phase noise below 300kHz is limited by the clock reference. Due to ultra-low phase noise nature of the device. In order to achieve specified phase noise, an ultra low noise clock reference is required. For example the Frequency Electronics FE-102, 100MHz reference has-170dBc/Hz phase noise at 10kHz offset. Reference clock note: The RF output frequency is related to the input frequency in an integer fashion. Typical reference clocks need to be in the 20MHz- 100MHz range. For example. A 13300MHz DRO needs a 100MHz clock(we found 50MHz and 25MHz to work as well) Please see pictures and data table. Manufacturer Herley CTI. Manufacturer Part Number PDRO T_13.3, Type PDRO. Phase Locked DRO, RF Output RF Output Port SMA-F. RF Output Power(dBm) +13dBm minimum(datasheet spec) 14.6dBm- 16.8dBm(measured across 13 models that we have in stock) RF Output Frequency(MHz) 13300 MHz +/ N*10kHz(N = multiplier factor) RF Output Frequency stability Reference dependent, Phase Noise Reference dependent, Offset(Hz) SSB Phase Noise(dBc/Hz) 100, reference dependent. See phase noise theoretical plot below table, 1K, reference dependent. See phase noise theoretical plot below table, 10K, reference dependent. See phase noise theoretical plot below table, 100K, reference dependent. See phase noise theoretical plot below table, 1M, 130, REF CLK Input REF CLK Input Port SMA-F. REF CLK Frequency(MHz) 100 MHz. As well as 50MHz, and 25MHz(tested) REF CLK Power(dBm) 3dBm to +3dBm(datasheet spec) We found that the DROs would lock with a-20dBm clock as well, DC Power Supply Voltage, 15VDC +/ 0.5V. Filtered feedthru connector, GND, Solder pin, Phase Lock Alarm Connector. Filtered feedthru TTL High. Locked. TTL Locked. Unlocked, Shipping: We always pack with care to
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